1. Field of the Invention
The present invention relates to a watch dog timer. More specifically, it relates to a watch dog timer which detects runaway of a microcomputer to output a signal for returning the same to normal operation.
2. Description of the Prior Art
FIG. 1 is a block diagram showing a conventional watch dog timer. Referring to FIG. 1, description is now made on the structure of the conventional watch dog timer 10. A microcomputer 1 is connected with a clear decision circuit 2 through a data bus 4, an address bus 5 and a write signal line 6. A reset signal 7 outputted from the microcomputer 1 is supplied to the clear decision circuit 2 and a free run counter 3. The microcomputer 1 further supplies clock signals 8 to the free run counter 3, which is adapted to count the clock signals 8. The clear decision circuit 2 supplies a clear signal 9 to the free run counter 3 on the basis of data and address supplied from the microcomputer 1 through the data bus 4 and the address bus 5.
Description is now made on the operation of the conventional watch dog timer 10 as shown in FIG. 1. Upon application of power, the free run counter 3 immediately starts counting the clock signals 8. In normal operation of the microcomputer 1, a specific code is supplied to the clear decision circuit 2 within a prescribed period through the data bus 4 and the address bus 5, and the clear decision circuit 2 decides the specific code to supply the clear signal 9 to the free run counter 3. The free run counter 3 is cleared by the clear signal 9. Thus, the free run counter 3 is cleared by the clear signal 9 from the clear decision circuit 2 every time it counts a prescribed number of clocks, so far as the microcomputer 1 operates normally. Therefore, the free run counter 3 outputs no reset signal 11 indicating abnormal operation of the microcomputer 1. Consequently, the microcomputer 1 can continuously execute programs stored in memory (not shown) contained therein.
When the microcomputer 1 operates abnormally, no specific code is supplied from the microcomputer 1 to the clear decision circuit 2 through the data bus 4 and the address bus 5, whereby the clear decision circuit 2 outputs no clear signal 9. Therefore, the free run counter 3 is not cleared and continuously counts the clock signals 8. Upon counting a predetermined number of clock signals, the free run counter 3 outputs the reset signal 11 indicating abnormal operation of the microcomputer 1. The microcomputer 1 stops execution of the programs by the reset signal 11 outputted from the free run counter 3, to re-start the execution from the first program. Thus, the microcomputer 1 is prevented from runaway.
The free run counter 3 can also be cleared by the reset signal 7 outputted from the microcomputer 1.
The conventional watch dog timer 10 of the aforementioned structure achieves the watch-dog function so far as the power is applied to supply the clock signals 8 to the free run counter 3. Therefore, runaway of, e.g., an on-vehicle microcomputer employed to control a printer may not cause any serious trouble. In order to drive the watch dog timer 10, however, specific codes must be continuously supplied to the clear decision circuit 2 for clearing the free run counter 3. Therefore, a number of such specific codes must be inserted in the programs of the microcomputer 1, leading to increase in the programs to be executed.